工作內容
1. Digital IC design
2. Low power design
3. RTL coding/simulation
4. SoC integration
5. FPGA/IC verification
工作說明
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工作縣市:新北市
- 上班地點:新北市新店區
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工作待遇:面議
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上班時段:日班,
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需求人數:6
條件要求
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工作經歷:
3年以上
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學歷要求:碩士
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科系要求:
電機電子工程相關
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專長需求:
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擅長工具:
- 具備駕照:
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其他條件:
1. Familiar with Verilog RTL coding/simulation
2. Familiar with 28nm/12nm or advanced process
3. Familiar with low power methodology
4. Familiar with FPGA verification
5. Experience in AXI/APB protocol or advanced AMBA bus is preferred
6. Experience in PCIe SSD is preferred
7. Experience in NVMe/DMA/bus design is preferred
8. Experience in SoC integration is preferred
